Teradyne 973ST dram structural tester

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Subject: Teradyne 973ST dram structural tester
• Model: J973ST Structural Tester • I/O Channels: 128 in 32 channel increments (91 inputs, 37 outputs) • Maximum clock rate: 500MHZ • Maximum data rate: 400MHZ when multiplexing • Timing Generators: 6 per pin • Edge placement accuracy: +/- 225 ps • Minimum Pulse Width: 1ns • Edges per pin: 6 per cycle • Pattern depth: 4M per channel • Large vector memory: 4M • Fall vector memory: 512 locations deep • Scan test: 48 scan chains (48 in/48 out) 256M per pin • 4 Voltage sources: -10V to 12V (5A) • Total pin count: 256 • Software: IG900+ (or newer) • Clock: Multiple Clock Generator(MCG) generating up to 4 pulses per cycle, up to 500MHZ frequency • Controller: Sun ULTRASPARC • Additonal data available upon request Item being sold as-is, where is.
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